What is Sarbanes-Oxley[q]

Introduction

In Chapter 3, you learned the methods for realizing Boolean functions as multilevel networks. A multilevel network potentially reduces the wiring complexity of a Boolean function's implementation. You also met our first complex gate, the AND-OR-Invert gate. In this chapter, you will learn about more customizable and complex building blocks that can realize Boolean functions with fewer components and wires:

• Design with structured circuit implementation styles based on programmable array logic and memories. We introduce PALs/PLAs and ROMs, which are particularly useful general-purpose digital building blocks that can be customized to implement specific functions. They are used to implement complex functions in very little space.
• Design with logic building blocks that are different from traditional logic gates. In this chapter, we introduce several new components: multiplexers, selectors, decoders, and demultiplexers. These are Boolean functions that are often easier to visualize as switching networks than as truth tables or logic gates. You will learn the design methods for using them in digital systems. In addition, we will look at tri-state and open-collector gates, classes of logic whose outputs are not always 0 and 1.
• Word problems. We will develop a design procedure for transforming English-language descriptions into hardware implementations and will illustrate the method with several case studies.

Table of Contents

4.1. Programmable Arrays of Logic Gates 4.2. Beyond Simple Logic Gates 4.3. Combinational Logic Word Problems Chapter Review Exercises [Table of Contents] [Next] [Prev]

This file last updated on 07/13/96 at 21:42:49. randy@cs.Berkeley.edu;