| The floating-point instructions perform several operations, including: -
Floating-point arithmetic -
Floating-point value conversions -
Floating-point value comparisons We will see that the floating-point instructions follow three general syntax rules: instruction freg 1 , freg 2 instruction sfreg, dfreg instruction sfreg 1 , sfreg 2 , dfreg Floating-point arithmetic instructions Here are the arithmetic instructions. Table B-20. SPARC floating-point arithmetic instructions | Instruction Syntax | Operation | | fsqrts sfreg, dfreg | Put square root of single word in sfreg into dfreg | | fsqrtd sfreg, dfreg | Square root, double word | | fsqrtq sfreg, dfreg | Square root, quad word | | fadds sfreg 1 , sfreg 2 , dfreg | Add single words sfreg1 and sfreg2 , put result in dfreg | | faddd sfreg 1 , sfreg 2 , dfreg | Add double words | | faddq sfreg 1 , sfreg 2 , dfreg | Add quad words | | fsubs sfreg 1 , sfreg 2 , dfreg | Subtract single word sfreg2 from sfreg1 , put result in dfreg | | fsubd sfreg 1 , sfreg 2 , dfreg | Subtract double words | | fsubq sfreg 1 , sfreg 2 , dfreg | Subtract quad words | | fdivs sfreg 1 , sfreg 2 , dfreg | Divide single word sfreg1 by sfreg2 , result in dfreg | | fdivd sfreg 1 , sfreg 2 , dfreg | Divide double words, result in dfreg | | fdivq sfreg 1 , sfreg 2 , dfreg | Divide quad words, result in dfreg | | fmuls sfreg 1 , sfreg 2 , dfreg | Multiply single words, single word result in dfreg | | fmuld sfreg 1 , sfreg 2 , dfreg | Multiply double words, double word result | | fmulq sfreg 1 , sfreg 2 , dfreg | Multiply quad words, quad word result | | fsmuld sfreg 1 , sfreg 2 , dfreg | Multiply single words, double word result | | fsmulq sfreg 1 , sfreg 2 , dfreg | Multiply double words, quad word result | Floating-point value conversions When working with floating-point values, it is often necessary to convert the values to integer values, or from integer back to floating-point. There are also times when a conversions from one floating-point precision to another are needed. The following instructions perform all of the floating-point value conversions: Table B-21. Floating-point value conversion instructions | Instruction Syntax | Operation | | fitos sfreg, dfreg | Convert integer value in sfreg to single word, result in dfreg | | fitod sfreg, dfreg | Convert integer value sfreg to double word dfreg | | fitoq sfreg, dfreg | Convert integer value sfreg to double word dfreg | | fstoi sfreg, dfreg | Convert single word in sfreg to integer value, result in dfreg | | fdtoi sfreg, dfreg | Convert double word sfreg to integer value dfreg | | fqtoi sfreg, dfreg | Convert quad word sfreg to integer value dfreg | | fstod sfreg, dfreg | Convert single word in sfreg to double word, result in dfreg | | fstoq sfreg, dfreg | Convert single word sfreg to quad word dfreg | | fdtos sfreg, dfreg | Convert double word sfreg to single word dfreg | | fdtoq sfreg, dfreg | Convert double word sfreg to quad word dfreg | | fqtos sfreg, dfreg | Convert quad word sfreg to single word dfreg | | fqtod sfreg, dfreg | Convert quad word sfreg to double word dfreg | Floating-point value comparisons Earlier, we saw that the floating-point unit has a set of condition code bits and that there are a set of branch on floating-point conditions codes instructions. What we have not yet seen is how the fcc bits get modified. As a reminder, the comparison instructions set the fcc bits, as shown below. | fcc bits | Code | Relationship Between Two Floating-Point Values | | 00 | E | freg 1 = freg 2 | Values were equal | | 01 | L | freg 1 < freg 2 | freg 1 less than freg 2 | | 10 | G | freg 1 > freg 2 | freg 1 greater than freg 2 | | 11 | U | freg 1 ? freg 2 | freg 1 and freg 2 are unordered | Here are the floating-point value comparison instructions. Table B-22. Floating-point value comparison instructions | Instruction Syntax | Operation | | fcmps freg 1 , freg 2 | Compare single words | | fcmpd freg 1 , freg 2 | Compare double words | | fcmpq freg 1 , freg 2 | Compare quad words | Table B-22. Floating-point value comparison instructions | Instruction Syntax | Operation | | fcmpes freg 1 , freg 2 | Compare single words and cause an fp exception if unordered | | fcmped freg 1 , freg 2 | Compare double words and cause exception if unordered | | fcmpeq freg 1 , freg 2 | Compare quad words and cause exception if unordered | Miscellaneous floating-point instructions There are three miscellaneous floating-point instructions, as follows : Table B-23. Miscellaneous floating-point instructions | Instruction Syntax | Operation | | fmovs sfreg, dfreg | Copy sfreg into dfreg | | fnegs sfreg, dfreg | Copy sfreg into dfreg with the sign bit complemented ( reversed ) | | fabss sfreg, dfreg | Copy sfreg into dfreg with the sign bit cleared | The floating-point instructions can generate fp exception and fp disabled traps, all of which must result in the operating system processing the requested instruction via software, such as floating-point library routines. |