32/64-Bit 80x86 Assembly Language Architecture

BCD

Binary-coded decimal notation

bi-endian

A byte ordering of either big-endian or little-endian supported by a processor.

(Byte)

 

  1

  2

  3

 

0x1A2B3C4D

1A

2B

3C

4D

Big

 

4D

3C

2B

1A

Little

Note that the byte is endianless; that is, whether it is big-endian or little-endian, the MSB (most significant bit) is bit #7 and the LSB (least significant bit) is bit #0.

big-endian

The byte ordering typically used by large mainframes. For purposes of this book, that would include the EE, VU, PowerPC-AltiVec, and PowerPC-Gekko processors.

 

 

  1

  2

  3

0x1A2B3C4D

1A

2B

3C

4D

blit

The process of transferring one or more blocks of data. The etymology of the word is Bacon, Lettuce, and Interactive Tomato.

branch prediction

A methodology used by a processor to predict at a conditional jump whether an instruction branch will be taken or not.

BSP

Board Support Package

BTB

Branch Target Buffer

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