Wireless Communications Circuits and Systems (IEE Circuits, Devices and Systems Series 16)

2.10 References

  1. Razavi, B.: ‘Design considerations for direct-conversion receivers’, IEEE Transactions on Circuits and Systems-II, 1997, 44 (6), pp. 428–35

  2. Minnis, B. J., MOORE, P. A., PAYNE, A. W., CASWELL, A. C. and BARNARD, M. E.: ‘A low-IF polyphase receiver for GSM using log-domain signal processing’. IEEE RFIC2000 Symposium, Boston, MA, June 11–13, 2000, pp. 83–6

  3. Droinet, Y.: ‘Advanced RF technologies for the wireless market’, Microwave Journal, September 2001, pp. 148–59

  4. Voorman, J. O.: ‘The gyrator as a monolithic circuit in electronic systems’. PhD Thesis, Catholic University of Nijmegen, The Netherlands, June 1977

  5. Ali, D.: ‘Radio Receiver’. International patent application No. WO 00/22735, September 1999

  6. http://www.3gpp.org

  7. ETSI Secretariat, ‘GSM: digital cellular telecommunications system (phase 2) radio transmission and receptions (GSM 05.05)’. ETS 300 577, F-06921 Sophia Antipolis, Cedex, France, March 1996

  8. Gingell, M. J.: ‘Single sideband modulation using sequence asymmetric polyphase networks’, Electrical Communications, 1973, 48 (1 & 2), pp. 21–5

  9. Haykin, S.: ‘Communication systems’ (Second Edition, John Wiley, 1983)

  10. Boser, B. E. and WOOLEY, B. A.: ‘Design of sigma-delta modulation analogue-to-digital converters’, IEEE Journal of Solid-State Circuits, 1988, 23 (6), pp. 1298–308

  11. Candy, J. C. and TEMES, G. C.: ‘Oversampling methods for A/D and D/A conversion’, ‘Oversampling Delta-Sigma Data Converters, Theory, Design and Simulation’ (IEEE Press, Piscataway, N.J., 1991) pp. 1–25

  12. Cadence Design Systems, ‘System processing worksystem (SPW)’, http://www.cadence.com

  13. Minnis, B. J. and MOORE, P. A.: ‘A reconfigurable receiver architecture for 3G mobiles’. 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Seattle, WA, June 2–4 2002, pp. 187–90

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