Wireless Communications Circuits and Systems (IEE Circuits, Devices and Systems Series 16)

continuous-time design 57

sampled-data design 57

CAD design procedure 56

using FPAAs 56-7

calibration procedures 160

short-open-load-through (SOLT) 160

cascoding 237

circuit under test (CUT) 248, 251, 260-2, 269, 271

class AB CMOS transconductor 86, 89-95

cell development 86, 89-93

frequency tuning 93-5

class-E power amplifier 212, 232-4

optimisation results 234-7

CMOS

circuit techniques 109

digital processes 105, 108

fully-integrated LC-based VCOs 168

g_m-C technique 59

LNA topology 152

optimisation results 239

RF distributed amplifiers 237-9

technologies 2, 6, 7, 58, 75, 152, 154, 158-9, 183, 186, 191, 192, 197, 208, 211, 212, 215, 217, 231, 264

commercial FPAAs 54, 60-3, 75

common-mode feedback networks 91, 93, 95

comparator clocking system 260, 272

complex filters 82-4, 137

component substitution technique 115, 144

component tolerances 108, 109, 111, 146

configurable analogue blocks (CABs) 54-9, 61, 63, 65, 67-8, 71, 75, 76

configurable analogue cell (CAC) 56

conjugate match 193-4

continuous-time filters

active filters 105

design methods 109-30

on-chip tuning of 131-45

conventional cascode LNA architecture 153

conventional gradient descent optimisation techniques 220

conventional superhet architecture 10

coupling capacitors 94, 154, 172, 174, 209

current-sensed FDB (CSFDB) 46

Czarnul, Z. 124