HyperTransportв„ў System Architecture

The Previous Chapter

The large 1 Terabyte HT address space may be outside the limits of a given processor or expansion bus. When address locations are mapped into the HT space that exceed the processor or expansion bus address space, then the addresses must be remapped to and from HT space. The previous chapter discussed the HT solution for remapping memory, MMIO, and I/O addresses.

This Chapter

Many HT platforms may be based on x86 processors, and the HT specification defines the necessary compatibility support. This chapter discusses the x86 features that require specific support by HT and details how HT provides the capability.