HyperTransportв„ў System Architecture
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I/O Address ReMapping I/O Base and Limit Registers 2nd I/O Stream 2nd 3rd Information Packet 2nd 3rd 4th 5th 6th Initialization Complete 2nd 3rd Interleaving Control and Data Packets Interrupt Capability Block Format Interrupt Definition Register 2nd 3rd 4th Interrupt Discovery and Configuration Capability Block 2nd 3rd Interrupt Information Fields Interrupt Line Register 2nd Interrupt Pin Register 2nd Interrupt Request Data Packet Interrupt Request Packet Interrupt Requests Interrupt Signaling Interrupt Type Field Isoc Bit Isochronous Channel 2nd Isochronous Flow Control 2nd Isochronous Transactions
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