Fast Track UML 2.0

A state machine diagram shows a state machine. The emphasis is the flow of control between states.

Figure 7-20 shows an excerpt from an example state machine diagram. (The use of an enclosing box and a name for the diagram are optional.)

Figure 7-20: State machine diagram

Since state machine diagrams are generally done at the design level, it makes sense to put them into design-level packages, such as the one shown in Figure 7-21.

Figure 7-21: Design package with state diagram